From Transistor to Logic
CMOS logic, basic gates, and how billions of transistors make a processor
CMOS: The Foundation of Digital Logic
CMOS: The Foundation of Digital Logic
CMOS (Complementary Metal-Oxide-Semiconductor) pairs NMOS and PMOS transistors to create logic gates that consume almost zero power when not switching:
- PMOS pull-up network: Connects output to VDD (high) when input conditions are met
- NMOS pull-down network: Connects output to ground (low) when input conditions are met
- At any time, either pull-up OR pull-down is active — never both simultaneously (ideally)
The simplest CMOS gate is the inverter (NOT gate): 1 PMOS + 1 NMOS transistor. Input HIGH → NMOS on, output LOW. Input LOW → PMOS on, output HIGH.
Key Concept: Why CMOS Dominates
CMOS draws significant current only during switching transitions. In static states (output stable at 0 or 1), current flow is nearly zero. This is why CMOS replaced earlier NMOS-only logic — it enabled the low power consumption that makes battery-powered devices possible.
Basic Logic Gates
Basic Logic Gates
All digital computation is built from combinations of a few basic gates:
| Gate | Transistors | Function |
|---|---|---|
| NOT (Inverter) | 2 | Output = opposite of input |
| NAND | 4 | Output LOW only when ALL inputs HIGH |
| NOR | 4 | Output HIGH only when ALL inputs LOW |
| AND | 6 | NAND + inverter |
| OR | 6 | NOR + inverter |
A remarkable result from computer science: any computation can be built using only NAND gates (or only NOR gates). In practice, synthesis tools choose the optimal combination of standard cells from a library containing hundreds of pre-designed gate variations.
Analogy: LEGO Bricks
Logic gates are the LEGO bricks of computing. Just as you can build anything from a few basic LEGO shapes, you can build any computer from basic logic gates. A modern CPU is simply billions of these gates connected in precisely the right pattern.
Knowledge Check
Knowledge Check
1 / 2Why does CMOS logic consume very little static power?