Packaging & Testing
Back-end processing: dicing, bonding, packaging, and final test
From Wafer to Package
From Wafer to Package
After front-end fabrication is complete, each wafer contains hundreds of individual dies. The back-end process transforms these bare dies into functional, packaged chips:
- Wafer probe/sort: Each die is electrically tested while still on the wafer. Failed dies are marked with ink dots.
- Dicing: A diamond saw or laser cuts the wafer into individual dies along the scribe lines.
- Die attach: Good dies are picked and bonded to a substrate or lead frame using adhesive or solder.
- Wire bonding or flip-chip: Electrical connections are made between the die's bond pads and the package pins using gold/copper wires or solder bumps.
- Encapsulation: The die is sealed in a protective package (plastic molding, ceramic, or organic substrate).
- Final test: Packaged chips undergo comprehensive electrical testing at various temperatures and speeds.
Key Concept: Speed Binning
During final test, chips are sorted by maximum operating speed. Faster chips are sold at premium prices, while slower ones are sold as lower-tier products. This is why the same chip design appears at different clock speeds and price points.
Advanced Packaging
Advanced Packaging
As transistor scaling slows, advanced packaging has become a critical way to improve performance:
- Chiplets: Instead of one monolithic die, multiple smaller dies (chiplets) are connected in a single package. AMD's Ryzen and Apple's M-series Ultra chips use this approach.
- 2.5D packaging: Chiplets are placed side-by-side on a silicon interposer that provides high-bandwidth connections between them (e.g., HBM memory stacks next to GPUs).
- 3D stacking: Dies are stacked vertically and connected using Through-Silicon Vias (TSVs) — essentially tiny copper pillars through the silicon.
- Fan-out wafer-level packaging (FOWLP): Redistributes die connections over a larger area, enabling thinner packages for mobile devices.
Analogy: LEGO Blocks
Advanced packaging is like building with LEGO blocks instead of carving from a single block of wood. You can mix and match chiplets — different functions, different process nodes, different manufacturers — and snap them together into a high-performance system.
Knowledge Check
Knowledge Check
1 / 2What is 'speed binning' in chip manufacturing?