Wafer Fabrication Overview
Front-end processing: the fab, cleanrooms, and key process steps
The Cleanroom Environment
The Cleanroom Environment
Semiconductor fabrication takes place in cleanrooms — environments where airborne particles are strictly controlled. A single dust particle can ruin a chip with features just a few nanometers wide.
Cleanroom classifications (ISO 14644-1, max particles per m³ at the specified size):
| ISO Class | FED-STD-209E equivalent | Max particles/m³ (≥0.5 µm) | Usage |
|---|---|---|---|
| ISO 3 | Class 1 | ~35 | Advanced lithography areas (EUV) |
| ISO 4 | Class 10 | ~352 | General sub-7nm wafer processing |
| ISO 5 | Class 100 | ~3,520 | Mainstream wafer processing |
| ISO 7 | Class 10,000 | ~352,000 | Assembly / test areas |
| ISO 8 | Class 100,000 | ~3,520,000 | Support / packaging areas |
For comparison, typical outdoor urban air contains tens of millions of particles per m³ ≥0.5 µm. Cleanroom workers wear full "bunny suits" to prevent shedding skin cells and hair.
Analogy: Operating Room × 1000+
A hospital operating room is roughly ISO Class 7 (≤352,000 particles/m³ ≥0.5 µm). A fab's ISO 3 lithography bay is about 10,000× cleaner than that operating room.
The Core Process Steps
The Core Process Steps
Building a chip involves repeating a handful of core process steps hundreds of times in precise sequence:
- Deposition: Adding thin layers of material (silicon dioxide, silicon nitride, metals) onto the wafer surface using techniques like CVD, PVD, and ALD.
- Lithography: Transferring circuit patterns from a mask onto the wafer using light-sensitive photoresist. This defines where features will be created.
- Etching: Selectively removing material where the photoresist was developed away, creating the actual structures.
- Ion Implantation: Shooting dopant atoms (boron, phosphorus, arsenic) into the silicon to create regions with different electrical properties.
- CMP (Polishing): Flattening each layer before building the next one on top.
- Cleaning: Removing contaminants between steps — a wafer is cleaned 100+ times during fabrication.
Key Concept: Process Integration
A modern chip requires 500–1,000+ individual process steps performed over 2–3 months. The sequence, timing, and parameters of each step are the fab's closely guarded trade secrets — this is process integration.
Knowledge Check
Knowledge Check
1 / 2How many individual process steps does a modern chip require?