Barrier & Liner Layers
Preventing copper diffusion and ensuring adhesion
Why Barriers Are Critical
Why Barriers Are Critical
Copper is a fast diffuser in silicon and SiO₂. Without barriers, copper atoms would migrate into the dielectric and silicon, causing:
- Dielectric leakage: Copper in the insulator creates conductive paths between wires (shorts)
- Transistor degradation: Copper in silicon creates deep-level traps that destroy device performance
- Reliability failures: Copper migration under voltage stress causes time-dependent failures
The standard barrier stack is TaN/Ta:
- TaN (tantalum nitride): Amorphous barrier that blocks copper diffusion. Deposited by PVD or ALD.
- Ta (tantalum): Promotes adhesion between the barrier and copper. Its BCC crystal structure helps copper nucleate in the preferred (111) orientation for better reliability.
As wires shrink, the barrier takes up a larger fraction of the trench width, reducing the effective copper area and increasing resistance. This is the "barrier scaling challenge" — a major driver of research into alternative materials.
Beyond TaN/Ta: Cobalt, Ruthenium, and Self-Forming Barriers
Beyond TaN/Ta: Cobalt, Ruthenium, and Self-Forming Barriers
At sub-10 nm linewidths, a 2 nm PVD TaN/Ta stack consumes a third or more of the trench cross-section. Industry has responded with three families of alternatives:
| Approach | Materials | Where deployed | Pros | Cons |
|---|---|---|---|---|
| Cobalt cap / liner | Co (ALD or CVD) | Intel 14nm+, TSMC N7/N5 contact & M0 | Improves electromigration, replaces W contact plug | Higher bulk ρ than Cu |
| Ruthenium fill | Ru (CVD) | Sub-2 nm research via fills | Doesn't need a separate barrier; lower ρ at <10 nm | Expensive precursor, integration challenges |
| Self-forming barrier | Cu–Mn alloy seed | Research / pilot lines | Mn segregates to dielectric interface to form barrier in situ | Limited industrial uptake so far |
| Subtractive Ru / Mo | Etched Ru or Mo lines | Future "post-damascene" research | No barrier overhead at all — back to subtractive patterning | Requires new etch chemistries |
Key Concept: Barrierless Interconnects
The endgame is to eliminate the barrier entirely. Ru and Mo don't diffuse into low-k dielectrics, so a single material can serve as both the conductor and its own diffusion barrier. That recovers the full trench cross-section for current — the only obvious way to keep interconnect resistance from exploding below 2 nm.
Knowledge Check
Knowledge Check
1 / 2Why are barrier layers needed around copper interconnects?